A 5.22 μw digital-to-analog converter based on I-2I CMOS architecture
Koushaeian L., Ghafari B., Goodarzy F., Evans R.
This paper discusses the design of a low power metaloxide-semiconductor (MOS)-only current-steering digital to analog converter (DAC) architecture for the realisation of a DAC block of the successive approximation analog to digital converter (ADC) circuit in the retinal prosthesis. Retinal prostheses have great potential for restoring vision to patients suffering from age related macular degeneration (AMD) and retinitis pigmentosa (RP). Here a circuit is proposed and implemented on 65 nm IBM CMOS process, which generates an analog signal from 10-bit digital signal. The circuit consumes 5.22 μW at room temperature from a power supply of the 1.2 V. The new DAC architecture successfully maintains low power consumption and has a significant reduction in layout area for higher bit resolution. © 2013 IEEE.