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The design of two critical building blocks for the realization of an all-integrated transceiver, the power amplifier (PA) and the transmit/receive switch (T/R switch), using a 130-nm CMOS process will be presented. The PA operating from a 2.5-V supply exhibits an output referred P1dB of 9.0 dB, a PSAT of +13.1 dBm, with peak power gain of 14.9 dB, a 3-dB bandwidth of 6.7 GHz, and 2.8 % power added efficiency (PAE). The T/R switch has an insertion loss from 3.5 to 4.9 dB, an isolation between transmit and receive ports better than 30 dB, and return losses at active ports less than -11 dB across the 57-66 GHz band. The input referred P1dB of the switch is 7.2 dBm. ©2008 IEEE.

Original publication

DOI

10.1109/ICMMT.2008.4540328

Type

Conference paper

Publication Date

15/09/2008

Volume

1

Pages

155 - 158