60-GHz direct-conversion transceiver on 130-nm CMOS with integrated digital control interface
Wicks BN., Ta CM., Zhang F., Nadagouda P., Yang B., Liu Z., Mo Y., Wang K., Walsh T., Felic G., Evans RJ., Mareels I., Skafidas E.
This paper describes the system architecture and design procedure for an integrated 60-GHz direct-conversion transceiver with integrated digital control interface on a 130-nm CMOS process. This transceiver incorporates both a transmitter and receiver. The transmitter achieves a Psat of 6.5 dBm, an OP1dB of 1.6 dBm. The receiver achieves a conversion gain of 8.1 dB with an IIP3 of -13.74 dBm. © 2009 EuMA.